# HG changeset patch
# User Dmitriy Taychenachev <dimichxp@gmail.com>
# Date 1247714831 -32400

diff --git a/drivers/spi/spi_imx.c b/drivers/spi/spi_imx.c
--- a/drivers/spi/spi_imx.c
+++ b/drivers/spi/spi_imx.c
@@ -36,7 +36,9 @@
 #include <asm/delay.h>
 
 #include <mach/hardware.h>
+#ifndef SPI_DISABLE_DMA
 #include <mach/imx-dma.h>
+#endif
 #include <mach/spi_imx.h>
 
 /*-------------------------------------------------------------------------*/
@@ -243,6 +245,7 @@
 	irqreturn_t (*transfer_handler)(struct driver_data *drv_data);
 	void (*cs_control)(u32 command);
 
+#ifndef SPI_DISABLE_DMA
 	/* DMA setup */
 	int rx_channel;
 	int tx_channel;
@@ -252,6 +255,7 @@
 	int tx_dma_needs_unmap;
 	size_t tx_map_len;
 	u32 dummy_dma_buf ____cacheline_aligned;
+#endif
 
 	struct clk *clk;
 };
@@ -458,6 +462,7 @@
 	return DONE_STATE;
 }
 
+#ifndef SPI_DISABLE_DMA
 static int map_dma_buffers(struct driver_data *drv_data)
 {
 	struct spi_message *msg;
@@ -569,6 +574,7 @@
 		drv_data->tx_dma_needs_unmap = 0;
 	}
 }
+#endif /* SPI_DISABLE_DMA */
 
 /* Caller already set message->status (dma is already blocked) */
 static void giveback(struct spi_message *message, struct driver_data *drv_data)
@@ -593,6 +599,7 @@
 	queue_work(drv_data->workqueue, &drv_data->work);
 }
 
+#ifndef SPI_DISABLE_DMA
 static void dma_err_handler(int channel, void *data, int errcode)
 {
 	struct driver_data *drv_data = data;
@@ -697,6 +704,7 @@
 	/* Opps problem detected */
 	return IRQ_NONE;
 }
+#endif /* SPI_DISABLE_DMA */
 
 static irqreturn_t interrupt_wronly_transfer(struct driver_data *drv_data)
 {
@@ -929,8 +937,10 @@
 	drv_data->tx_end = drv_data->tx + transfer->len;
 	drv_data->rx = transfer->rx_buf;
 	drv_data->rx_end = drv_data->rx + transfer->len;
+#ifndef SPI_DISABLE_DMA
 	drv_data->rx_dma = transfer->rx_dma;
 	drv_data->tx_dma = transfer->tx_dma;
+#endif
 	drv_data->len = transfer->len;
 	drv_data->cs_change = transfer->cs_change;
 	drv_data->rd_only = (drv_data->tx == NULL);
@@ -961,6 +971,7 @@
 	/* Assert device chip-select */
 	drv_data->cs_control(SPI_CS_ASSERT);
 
+#ifndef SPI_DISABLE_DMA
 	/* DMA cannot read/write SPI FIFOs other than 16 bits at a time; hence
 	   if bits_per_word is less or equal 8 PIO transfers are performed.
 	   Moreover DMA is convinient for transfer length bigger than FIFOs
@@ -1039,7 +1050,9 @@
 			writel(SPI_DMA_THDEN, regs + SPI_DMA);
 
 		imx_dma_enable(drv_data->tx_channel);
-	} else {
+	} else
+#endif /* SPI_DISABLE_DMA */
+	{
 		dev_dbg(&drv_data->pdev->dev,
 			"pump pio transfer\n"
 			"    tx      = %p\n"
@@ -1482,7 +1495,9 @@
 	master->setup = setup;
 	master->transfer = transfer;
 
+#ifndef SPI_DISABLE_DMA
 	drv_data->dummy_dma_buf = SPI_DUMMY_u32;
+#endif
 
 	drv_data->clk = clk_get(&pdev->dev, "perclk2");
 	if (IS_ERR(drv_data->clk)) {
@@ -1529,9 +1544,17 @@
 		goto err_no_irqres;
 	}
 
-	/* Setup DMA if requested */
+#ifdef SPI_DISABLE_DMA
+	if (platform_info->enable_dma) {
+		/* DMA is not supported */
+		dev_err(&pdev->dev,
+			"probe - DMA is requested but not supported\n");
+		goto err_no_dma;
+	}
+#else
 	drv_data->tx_channel = -1;
 	drv_data->rx_channel = -1;
+	/* Setup DMA if requested */
 	if (platform_info->enable_dma) {
 		/* Get rx DMA channel */
 		drv_data->rx_channel = imx_dma_request_by_prio("spi_imx_rx",
@@ -1581,6 +1604,7 @@
 		BLR(drv_data->rx_channel) = SPI_DMA_BLR;
 		BLR(drv_data->tx_channel) = SPI_DMA_BLR;
 	}
+#endif /* SPI_DISABLE_DMA */
 
 	/* Load default SPI configuration */
 	writel(SPI_RESET_START, drv_data->regs + SPI_RESET);
@@ -1615,9 +1639,13 @@
 err_spi_register:
 	destroy_queue(drv_data);
 
+#ifdef SPI_DISABLE_DMA
+err_no_dma:
+#else
 err_no_rxdma:
 err_no_txdma:
 err_no_devid:
+#endif
 	free_irq(irq, drv_data);
 
 err_no_irqres:
@@ -1661,6 +1689,7 @@
 	writel(SPI_RESET_START, drv_data->regs + SPI_RESET);
 	writel(0, drv_data->regs + SPI_RESET);
 
+#ifndef SPI_DISABLE_DMA
 	/* Release DMA */
 	if (drv_data->master_info->enable_dma) {
 		RSSR(drv_data->rx_channel) = 0;
@@ -1668,6 +1697,7 @@
 		imx_dma_free(drv_data->tx_channel);
 		imx_dma_free(drv_data->rx_channel);
 	}
+#endif
 
 	/* Release IRQ */
 	irq = platform_get_irq(pdev, 0);